Intel® Arria® 10 Transceiver PHY User Guide

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ID 683617
Date 3/28/2022
Public
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2.6.6.7.2. XAUI PHY Advanced Options Parameters

This section describes the settings available on the Advanced Options tab.
Table 172.  Advanced Options
Name Value Description
Include control and status ports On / Off If you turn this option on, the top-level IP core includes the status signals and digital resets shown in XAUI Top-Level Signals—Soft PCS and PMA and XAUI Top-Level Signals—Hard IP PCS and PMA. If you turn this option off, you can access control and status information using the Avalon® memory-mapped interface to the control and status registers. The default setting is off.
Enable dynamic reconfiguration On / Off When you turn this option on, you can connect the dynamic reconfiguration ports to an external reconfiguration module.
Enable rx_recovered_clk pin On / Off When you turn this option on, the RX recovered clock signal is an output signal.
Enable phase compensation FIFO On / Off Enables the phase compensation FIFO to allow different clocks on the xgmii interface.

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