Visible to Intel only — GUID: nik1398706973096
Ixiasoft
Visible to Intel only — GUID: nik1398706973096
Ixiasoft
2.9.2. Using the Basic/Custom, Basic/Custom with Rate Match Configurations of Standard PCS
Use one of the following transceiver configuration rules to implement protocols such as SONET/SDH, SDI/HD, SATA, or your own custom protocol:
- Basic protocol
- Basic protocol with low latency enabled
- Basic with rate match protocol
In low latency modes, the transmitter and receiver FIFOs are always enabled. Depending on the targeted data rate, you can optionally bypass the byte serializer and deserializer blocks.
In low latency modes, the transmitter and receiver FIFOs are always enabled. Depending on the targeted data rate, you can optionally bypass the byte serializer and deserializer blocks.
- Word Aligner Manual Mode
- Word Aligner Synchronous State Machine Mode
- RX Bit Slip
- RX Polarity Inversion
- RX Bit Reversal
- RX Byte Reversal
- Rate Match FIFO in Basic (Single Width) Mode
- Rate Match FIFO Basic (Double Width) Mode
- 8B/10B Encoder and Decoder
- 8B/10B TX Disparity Control
- How to Enable Low Latency in Basic
- TX Bit Slip
- TX Polarity Inversion
- TX Bit Reversal
- TX Byte Reversal
- How to Implement the Basic, Basic with Rate Match Transceiver Configuration Rules in Arria 10 Transceivers
- Native PHY IP Parameter Settings for Basic, Basic with Rate Match Configurations
Did you find the information on this page useful?
Feedback Message
Characters remaining: