Intel® Arria® 10 Transceiver PHY User Guide

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ID 683617
Date 3/28/2022
Public
Document Table of Contents

2.6.5.3.3. Switching Operation Speed

Table 156.  Supported Operating Speed
PHY Configurations Features 10M 100M 1G 2.5G 5G 10G
2.5G Protocol 1000BASE-X at 2.5x
Transceiver Data Rate 3.125 Gbps
MAC Interface 16-bit GMII @ 156.25 MHz
1G/2.5G Protocol 1000BASE-X / SGMII 1000BASE-X at 2.5x
Transceiver Data Rate 1.25 Gbps 3.125 Gbps
MAC Interface 16-bit GMII @ 62.5 MHz 16-bit GMII @ 156.25 MHz
1G/2.5G/10G (MGBASE-T) Protocol 1000BASE-X / SGMII 1000BASE-X at 2.5x 10GBASE-R
Transceiver Data Rate 1.25 Gbps 3.125 Gbps 10.3125 Gbps
MAC Interface 16-bit GMII @ 62.5 MHz 16-bit GMII @ 156.25 MHz 64-bit XGMII @ 156.25 MHz
10M/100M/1G/2.5G/5G/10G (USXGMII) Protocol 10GBASE-R

1000x data replication

10GBASE-R

100x data replication

10GBASE-R

10x data replication

10GBASE-R

4x data replication

10GBASE-R

2x data replication

10GBASE-R

No data replication

Transceiver Data Rate37 10.3125 Gbps 10.3125 Gbps 10.3125 Gbps 10.3125 Gbps 10.3125 Gbps 10.3125 Gbps
MAC Interface 32-bit XGMII @ 312.5 MHz 32-bit XGMII @ 312.5 MHz 32-bit XGMII @ 312.5 MHz 32-bit XGMII @ 312.5 MHz 32-bit XGMII @ 312.5 MHz 32-bit XGMII @ 312.5 MHz
You can change the PHY speed using the reconfiguration block in the MAC+PHY example design.
  1. Initiates the speed change by writing to the corresponding register of the reconfiguration block.38
  2. The reconfiguration block performs the following steps:
    1. Sets the xcvr_mode signal of the 1G/2.5G/5G/10G Multi-rate Ethernet PHY Intel® FPGA IP core to the requested speed.
    2. Reads the generated .mif file for the configuration settings and configures the transceiver accordingly.
    3. Selects the corresponding transceiver PLL.
    4. Triggers the transceiver recalibration.
  3. The reconfiguration block triggers the PHY reset through the transceiver reset controller.
37 With oversampling for lower data rates.
38 You can change the speed within USXGMII (10M/100M/1G/2.5G/5G/10G) through CSR. It doesn't require reconfiguration block.

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