Intel® Arria® 10 Transceiver PHY User Guide

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ID 683617
Date 3/28/2022
Public
Document Table of Contents

8.9.1. XCVR_A10_REFCLK_TERM_TRISTATE

Pin planner or Assignment Editor Name

Dedicated Reference Clock Pin Termination

Description

Specifies if the termination for dedicated reference clock pin is tri-stated. It defaults to TRISTATE_OFF for non-HCSL cases.

Table 330.  Available Options

Value

Description

TRISTATE_OFF

Internal termination enabled and on-chip biasing circuitry enabled

TRISTATE_ON

Internal termination tri-stated. Off-chip termination and biasing circuitry must be implemented

Table 331.  Rules

I/O Standard

Value

HCSL

TRISTATE_ON

CML

TRISTATE_OFF

LVPECL

TRISTATE_OFF

LVDS

TRISTATE_OFF

Assign To

Reference clock pin.

Syntax

set_instance_assignment -name XCVR_A10_REFCLK_TERM_TRISTATE <value> -to <dedicated refclk pin name>

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