Intel® Arria® 10 Transceiver PHY User Guide

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ID 683617
Date 3/28/2022
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6.11. Reconfiguration Flow for Special Cases

Dynamic reconfiguration can be performed on logical operations such as switching between multiple transmit PLLs or multiple reference clocks. In these cases, configuration files alone cannot be used. Configuration files are generated during IP generation and do not contain information on the placement of PLLs or reference clocks.

To perform dynamic reconfiguration on logical operations, you must use lookup registers that contain information about logical index to physical index mapping. Lookup registers are read-only registers. Use these lookup registers to perform a read-modify-write to the selection MUXes to switch between PLLs or reference clocks.

To perform dynamic reconfiguration using reconfiguration flow for special cases:

  1. Perform the necessary steps from steps 1 to 7 in Steps to Perform Dynamic Reconfiguration.
  2. Read from the desired lookup register. Refer to the Switching Transmitter PLL and Switching Reference Clocks sections for information about lookup registers.
  3. Perform Logical Encoding (only required for Transmitter PLL switching).
  4. Perform read-modify-write to the required feature address with the desired/encoded value.
  5. Perform the necessary steps from steps 9 to 12 in Steps to Perform Dynamic Reconfiguration.

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