Intel® Arria® 10 Transceiver PHY User Guide

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ID 683617
Date 3/28/2022
Public
Document Table of Contents

2.6.4.6. 1G/10GbE PHY Interfaces

Figure 76. 1G/10GbE PHY Top-Level Signals

The block diagram shown in the parameter editor labels the external pins with the interface type and places the interface name inside the box. The interface type and name are provided in the _hw.tcl file. If you turn on Show signals, the block diagram displays all top-level signal names. For more information about _hw.tcl files, refer to the Component Interface Tcl Reference chapter in volume 1 of the Intel® Quartus® Prime Handbook.

Note: Intel® is deprecating some of the signals shown in this figure. The descriptions of these signals identifies them as not functional.

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