Intel® Arria® 10 Transceiver PHY User Guide

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ID 683617
Date 3/28/2022
Public
Document Table of Contents

2.9.2.15. TX Byte Reversal

The TX byte reversal feature can be enabled in low latency, basic, and basic rate match mode. The word aligner is available in any mode. This feature is parameter-based, and creates no additional ports. If there is more than one channel in the design, all channels have TX byte reversal.

To enable TX byte reversal, select the Enable TX byte reversal option in Platform Designer (Standard). It can also be dynamically controlled with dynamic reconfiguration.

Figure 158. TX Byte Reversal

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