Intel® Arria® 10 Transceiver PHY User Guide

ID 683617
Date 3/28/2022
Document Table of Contents Recommended Reset Sequence

How to Enable Model 1

Choose the Figure 202 for the Transceiver PHY Reset Controller IP. This populates the reset duration fields with the correct values required by the transceiver reset sequencer (TRS).

Figure 202. Arria 10 Default Settings Preset
Figure 203. Transmitter and Receiver Reset Sequence

Did you find the information on this page useful?

Characters remaining:

Feedback Message