Intel® Arria® 10 Transceiver PHY User Guide

ID 683617
Date 3/28/2022
Document Table of Contents

Follow this reset sequence to reset the analog or digital blocks of the receiver at any point during the device operation. Use this reset to re-establish a link or after dynamic reconfiguration.

Clock Data Recovery in Auto Lock Mode

The step numbers correspond to the numbers in the following figure:

  1. Assert rx_analogreset and rx_digitalreset. Ensure that rx_cal_busy is low. You must reset the PCS by asserting rx_digitalreset every time you assert rx_analogreset.

  2. Deassert rx_analogreset after a minimum duration of 70 μs.
  3. Ensure rx_is_lockedtodata is asserted for tLTD (minimum of 4 μs) before deasserting rx_digitalreset.
Figure 205. Resetting the Receiver During Device Operation (Auto Mode)
Note: rx_is_lockedtodata will toggle when there is no data at the receiver input. rx_is_lockedtoref is a don't care when rx_is_lockedtodata is asserted.

Clock Data Recovery in Manual Lock Mode

Use the clock data recovery (CDR) manual lock mode to override the default CDR automatic lock mode depending on your design requirements.

Control Settings for CDR Manual Lock Mode

Use the following control settings to set the CDR lock mode:
Table 245.  Control Settings for the CDR in Manual Lock Mode
rx_set_locktoref rx_set_locktodata CDR Lock Mode
0 0 Automatic
1 0 Manual-RX CDR LTR
X 1 Manual-RX CDR LTD

Resetting the Transceiver in CDR Manual Lock Mode

The numbers in this list correspond to the numbers in the following figure, which guides you through the steps to put the CDR in manual lock mode.

  1. Make sure that the calibration is complete (rx_cal_busy is low) and the transceiver goes through the initial reset sequence. The rx_digitalreset and rx_analogreset signals should be low. The rx_is_lockedtoref is a don't care and can be either high or low. The rx_is_lockedtodata and rx_ready signals should be high, indicating that the transceiver is out of reset. Alternatively, you can start directly with the CDR in manual lock mode after the calibration is complete.
  2. Assert the rx_set_locktoref signal high to switch the CDR to the lock-to-reference mode. The rx_is_lockedtodata status signal is deasserted. Assert the rx_digitalreset signal high at the same time or after rx_set_lockedtoref is asserted if you use the user-coded reset. When the Transceiver PHY reset controller is used, the rx_digitalreset is automatically asserted.
  3. After the rx_digitalreset signal gets asserted, the rx_ready status signal is deasserted.
  4. Assert the rx_set_locktodata signal high, tLTR_LTD_Manual (minimum 15 μs) after the CDR is locked to reference. rx_is_locktoref should be high and stable for a minimum tLTR_LTD_Manual (15 μs), before asserting rx_set_locktodata. This is required to filter spurious glitches on rx_is_lockedtoref. The rx_is_lockedtodata status signal gets asserted, which indicates that the CDR is now set to LTD mode.
    The rx_is_lockedtoref status signal can be a high or low and can be ignored after asserting rx_set_locktodata high after the CDR is locked to reference.
  5. Deassert the rx_digitalreset signal after a minimum of tLTD_Manual (4 μs).
  6. If you are using the Transceiver PHY Reset Controller, the rx_ready status signal gets asserted after the rx_digitalreset signal is deasserted. This indicates that the receiver is now ready to receive data with the CDR in manual mode.
Figure 206. Reset Sequence Timing Diagram for Receiver when CDR is in Manual Lock Mode

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