Intel® Arria® 10 Transceiver PHY User Guide

ID 683617
Date 9/15/2023
Document Table of Contents Transceiver Datapath in a XAUI Configuration

The XAUI PHY IP core is partially implemented in soft logic inside the FPGA core. You must ensure that your channel placement is compatible with the soft PCS implementation.
Figure 85. Transceiver Channel Datapath for XAUI ConfigurationThe XAUI configuration uses both the soft PCS and the Standard PCS as shown in the following figure.