Intel® Arria® 10 Transceiver PHY User Guide

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ID 683617
Date 3/28/2022
Public
Document Table of Contents

3.11.5. Timing Closure Recommendations

Register mode is harder to close timing in Arria 10 devices. Intel recommends using negative edge capture on the RX side for periphery to core transfers greater than 240 MHz. To be specific, capture on a negative edge clock in the core and then immediately transfer to a positive edge clock.
  • Use PCLK clock network for frequencies up to 250 MHz.
  • Local routing is recommended for higher frequencies.
For core to periphery transfers on TX targeting higher frequencies (beyond 250 MHz), Intel recommends using TX Fast Register mode as the PCS FIFO mode. This is the mode with PCLK that should be used by default for most 10GbE 1588 modes and 9.8 Gbps/10.1376 Gbps CPRI mode.
  • You can use local routing to get up to 320 MHz in Register mode for the highest speed grade.

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