Arria® 10 Transceiver PHY User Guide

ID 683617
Date 4/01/2024
Public
Document Table of Contents

3.11.5. Timing Closure Recommendations

Register mode is harder to close timing in Arria 10 devices. Intel recommends using negative edge capture on the RX side for periphery to core transfers greater than 240 MHz. To be specific, capture on a negative edge clock in the core and then immediately transfer to a positive edge clock.
  • Use PCLK clock network for frequencies up to 250 MHz.
  • Local routing is recommended for higher frequencies.
For core to periphery transfers on TX targeting higher frequencies (beyond 250 MHz),