Intel® Arria® 10 Transceiver PHY User Guide

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ID 683617
Date 3/28/2022
Public
Document Table of Contents

2.9.2.2. Word Aligner Synchronous State Machine Mode

To use this mode:

  • Select the Enable TX 8B/10B encoder option.
  • Select the Enable RX 8B/10B decoder option.

The 8B/10B encoder and decoder add the following additional ports:

  • tx_datak
  • rx_datak
  • rx_errdetect
  • rx_disperr
  • rx_runningdisp
  1. Set the RX word aligner mode to synchronous state machine.
  2. Set the RX word aligner pattern length option according to the PCS-PMA interface width.
  3. Enter a hexadecimal value in the RX word aligner pattern (hex) field.

The RX word aligner pattern is the 8B/10B encoded version of the data pattern. You can also specify the number of word alignment patterns to achieve synchronization, the number of invalid data words to lose synchronization, and the number of valid data words to decrement error count. This mode adds two additional ports: rx_patterndetect and rx_syncstatus.

Note:
  • rx_patterndetect is asserted whenever there is a pattern match.
  • rx_syncstatus is asserted after the word aligner achieves synchronization.
  • rx_std_wa_patternalign is asserted to re-align and re-synchronize.
  • If there is more than one channel in the design, tx_datak, rx_datak, rx_errdetect, rx_disperr, rx_runningdisp, rx_patterndetect, and rx_syncstatus become buses in which each bit corresponds to one channel.

You can verify this feature by monitoring rx_parallel_data.

Figure 136. Synchronization State Machine Mode when the PCS-PMA Interface Width is 20 Bits


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