Arria® 10 Transceiver PHY User Guide

ID 683617
Date 4/01/2024
Public
Document Table of Contents

5.1.5.7. How to Enable CTLE and DFE

Table 252.  Summary of Receiver Equalization Modes
Receiver Equalization Modes
CTLE adaptation mode Manual, Triggered (use the triggered mode for PCIe* Gen3 only)
DFE adaptation mode Adaptation enabled, Manual, Disabled
Number of fixed DFE taps 3, 7, 11
Follow these steps to trigger DFE adaptation:
  1. Request user access to the internal configuration bus by writing 0x2 to offset address 0x0[1:0].
  2. Monitor and wait for avmm_waitrequest to be deasserted (logic low) if "Separate reconfig_waitrequest from PreCISE" option is disabled. Otherwise, monitor and wait for register bit 0x281 bit[2] to go low if "Separate