Intel® Arria® 10 Transceiver PHY User Guide

ID 683617
Date 3/28/2022
Document Table of Contents Hard Transceiver PHY Registers

Table 145.  Hard Transceiver PHY Registers
Addr Bit Access Name Description
0x000-0x3FF [9:0] RW Access to HSSI registers All registers in the physical coding sub-layer (PCS) and physical media attachment (PMA) that you can dynamically reconfigure are in this address space. Refer to the Arria 10 Dynamic Transceiver Reconfiguration chapter for further information.

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