Intel® Arria® 10 Transceiver PHY User Guide

Download
ID 683617
Date 3/28/2022
Public
Document Table of Contents

6.16. Using Data Pattern Generators and Checkers

The Arria® 10 transceivers contain hardened data generators and checkers to provide a simple and easy way to verify and characterize high speed links. Hardening the data generators and verifiers saves FPGA fabric logic resources. The pattern generator block supports the following patterns:
  • Pseudo Random Binary Sequence (PRBS)
  • Pseudo Random Pattern (PRP)

The pattern generators and checkers are supported only for non-bonded channels.

Did you find the information on this page useful?

Characters remaining:

Feedback Message