Arria® 10 Transceiver PHY User Guide

ID 683617
Date 4/01/2024
Public
Document Table of Contents

2.4.9. Enhanced PCS Ports

Figure 24. Enhanced PCS InterfacesThe labeled inputs and outputs to the PMA and PCS modules represent buses, not individual signals.

In the following tables, the variables represent these parameters:

  • <n>—The number of lanes
  • <d>—The serialization factor
  • <s>— The symbol size
  • <p>—The number of PLLs
Table 48.  Enhanced TX PCS: Parallel Data, Control, and Clocks