Intel® Arria® 10 Transceiver PHY User Guide

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ID 683617
Date 3/28/2022
Public
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2.9.2.13. TX Polarity Inversion

The positive and negative signals of a serial differential link might accidentally be swapped during board layout. Solutions such as a board respin or major updates to the PLD logic can be expensive. The transmitter polarity inversion feature is provided to correct this situation. The Standard PCS supports both the static and dynamic polarity inversion features.

Transmitter polarity inversion can be enabled in low latency, basic, and basic rate match modes.

To enable TX polarity inversion, select the Enable TX polarity inversion and Enable tx_polinv port options in Platform Designer (Standard). It can also be dynamically controlled with dynamic reconfiguration.

This mode adds tx_polinv. If there is more than one channel in the design, tx_polinv is a bus with each bit corresponding to a channel. As long as tx_polinv is asserted, the TX data transmitted has a reverse polarity.

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