Intel® Arria® 10 Transceiver PHY User Guide

ID 683617
Date 9/15/2023
Document Table of Contents
Give Feedback Dynamic Reconfiguration Interface

You can use the dynamic reconfiguration interface signals to dynamically change between 1G and 10G data rates.
Table 142.  Dynamic Reconfiguration Interface Signals
Signal Name Direction Clock Domain Description
rc_busy Output Synchronous to mgmt_clk When asserted, indicates that reconfiguration is in progress. Synchronous to the mgmt_clk. This signal is only exposed under the following condition:
  • Turn on Enable internal PCS reconfiguration logic
start_pcs_reconfig Input Synchronous to