Arria® 10 Transceiver PHY User Guide

ID 683617
Date 4/01/2024
Public
Document Table of Contents

7.4.1.1. User Recalibration

User recalibration requires access to the internal configuration bus and calibration registers through the Avalon® memory-mapped interface reconfiguration. Follow the steps below to perform a user recalibration.

  1. Proceed to the next step if ATX PLL is not used in your application, otherwise perform the ATX PLL calibration process:
    1. Request access to the internal configuration bus by writing 0x2 to offset address 0x0[7:0].
    2. Wait for