Intel® Arria® 10 Transceiver PHY User Guide

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ID 683617
Date 3/28/2022
Public
Document Table of Contents

9.2.4.1. Transceiver Toolkit Parameter Settings

Table 334.  Parameter Settings in Channel Parameter Pane
Parameter Description Control Pane
Bit error rate (BER) Reports the number of errors divided by bits tested since the last reset of the checker. Receiver pane
Channel Address Logical address number of the transceiver channel.

Transmitter pane

Receiver pane

CTLE AC Gain Specifies the receiver's continuous time linear equalization (CTLE) AC gain. Receiver pane
CTLE DC Gain Provides an equal boost to the incoming signal across the frequency spectrum. Receiver pane
DFE Mode

Decision feedback equalization (DFE) for improving signal quality.

DFE modes are Off, Manual, and Adaptation Enabled. DFE in Adaptation Enabled mode automatically tries to find the best tap values.

Receiver pane
Equalization Engine Boosts the high-frequency gain of the incoming signal to compensate for the low-pass filter effects of the physical medium. When you use this option with DFE, use DFE in Manual or Adaptation Enabled mode. Receiver pane
Number of bits tested Specifies the number of bits tested since the last reset of the checker. Receiver pane
Number of error bits Specifies the number of error bits encountered since the last reset of the checker. Receiver pane
Pre-emphasis This programmable module boosts high frequency components in the transmit data for each transmit buffer signal. This action counteracts possible attenuation in the transmission media. Transmitter pane
Receiver channel Specifies the name of the selected receiver channel. Receiver pane
Refresh After loading the .sof file, loads fresh settings from the registers after running dynamic reconfiguration.

Transmitter pane

Receiver pane

Reset Resets the current test. Receiver pane
Run length Sets coverage parameters for test runs.

Transmitter pane

Receiver pane

RX CDR locked to ref clock Shows the receiver in lock-to-reference (LTR) mode. Receiver pane
RX CDR locked to data Shows the receiver in lock-to-data (LTD) mode. Receiver pane
Serial loopback enabled Inserts a serial loopback before the buffers, allowing you to form a link on a transmitter and receiver pair on the same physical channel of the device.

Transmitter pane

Receiver pane

Start Starts the pattern generator or checker on the channel to verify incoming data.

Transmitter pane

Receiver pane

Stop Stops generating patterns and testing the channel.

Transmitter pane

Receiver pane

Test pattern

Test pattern sent by the transmitter channel.

Test pattern available: PRBS7, PRBS9, PRBS15, PRBS23, and PRBS31.

Transmitter pane

Receiver pane

Time limit Specifies the time limit unit and value to have a maximum bounds time limit for each test iteration. Receiver
Transmitter channel Specifies the name of the selected transmitter channel. Transmitter pane
VGA DC Gain The variable gain amplifier (VGA) amplifies the signal amplitude and ensures a constant voltage swing before the data enters the clock data recovery (CDR) block for sampling Receiver pane
VOD Programmable transmitter differential output voltage. Transmitter pane

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