1.1.2. Intel® Arria® 10 GT Device Transceiver Layout
In the GT device, transceiver banks GXBL1E, GXBL1G, and GXBL1H each contain two GT transceiver channels. Transceiver banks GXBL1E and GXBL1H channels 3 and 4 can be used as GT or GX transceiver channel. Transceiver bank GXBL1G channels 0 and 1 can be used as GT or GX transceiver channels. When none of the GT capable transceiver channels are used as GT transceiver channels, the entire transceiver channels in the bank can be reconfigured as GX transceiver channels. However, when any of the GT capable transceiver channels in transceiver banks GXBL1E, GXBL1G, and GXBL1H is enabled as a GT transceiver channel, the remaining channels in the transceiver bank cannot be used with the exception of the other GT capable channel in the transceiver bank.
If you're using GT transceivers in bank GXBL1E, then the adjacent PCIe* Hard IP block cannot be used.
The GT device has 72 transceiver channels, which include 6 GT transceiver channels supporting data rates greater than 17.4 Gbps. If all six GT transceiver channels are used in GT mode, there are 54 GX transceiver channels that can drive chip to chip data rates up to 17.4 Gbps and backplanes at data rates up to 12.5 Gbps and 12 GX channels that are unusable.
In the GT device, the GX transceiver channels on the entire right side can be used in standard or reduced power mode. In GT devices where none of the GT channels are used to operate in GT data rates above 17.4 Gbps, the transceiver channels on either the entire right side or entire left side can be used as GX channels in standard or reduced power mode.
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