Intel® Arria® 10 Transceiver PHY User Guide

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ID 683617
Date 3/28/2022
Public
Document Table of Contents

2.9.2.6. RX Byte Reversal

The RX byte reversal feature can be enabled in low latency, basic, and basic rate match mode. The word aligner is available in any mode.

To enable this feature, select the Enable RX byte reversal and Enable rx_std_byterev_ena port options. This adds rx_std_byterev_ena. If there is more than one channel in the design, rx_std_byterev_ena becomes a bus in which each bit corresponds to a channel. As long as rx_std_byterev_ena is asserted, the RX data received by the core shows byte reversal.

You can verify this feature by monitoring rx_parallel_data.

Figure 143. RX Byte Reversal


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