Intel® Arria® 10 Transceiver PHY User Guide

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ID 683617
Date 3/28/2022
Public
Document Table of Contents

5.2.2.10.5. Basic Mode

In Basic mode, the RX FIFO operates as an elastic buffer, where buffer depths can vary. This mode allows driving write and read side of RX FIFO with different clock frequencies. Monitor the FIFO flag to control write and read operations. For RX FIFO, assert rx_enh_read_en signal with rx_fifo_pfull signal going low.

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