Arria® 10 Transceiver PHY User Guide

ID 683617
Date 4/01/2024
Public
Document Table of Contents

2.6.5.1.4. Resource Utilization

The following estimates are obtained by compiling the PHY IP core with the Quartus® Prime software.

Table 153.  Resource Utilization
Device Speed ALMs ALUTs Logic Registers Memory Block (M20K)
Arria® 10 1G/2.5G 550 750 1250