Intel® Arria® 10 Transceiver PHY User Guide

Download
ID 683617
Date 3/28/2022
Public
Document Table of Contents

1.1. Device Transceiver Layout

Figure 1.  Arria® 10 FPGA Architecture Block DiagramThe transceiver channels are placed on the left side periphery in most Arria® 10 devices. For larger Arria 10 devices, additional transceiver channels are placed on the right side periphery.


Did you find the information on this page useful?

Characters remaining:

Feedback Message