220.127.116.11.1. Word Aligner Bitslip Mode
In bitslip mode, the word aligner operation is controlled by rx_bitslip, which has to be held for two parallel clock cycles. At every rising edge of rx_bitslip, the bitslip circuitry slips one bit into the received data stream, effectively shifting the word boundary by one bit. Pattern detection is not used in bitslip mode; therefore, rx_syncstatus is not valid in this mode.