L- and H-Tile Transceiver PHY User Guide

ID 683621
Date 10/05/2023
Document Table of Contents Pattern Generator and Verifier Use Model

The pattern generator and verifier are shared between the Standard and Enhanced datapaths through the PCS. Therefore, they have only one set of control signals and registers. Either the data from the PCS or the data generated from the pattern generator can be sent to the PMA at any time.

Because of this, you must save the settings of the registers corresponding to the PRBS generators and verifiers before enabling them if you want to disable them later. You can enable the pattern generators and verifier through registers outlined in the Logical View of the L-Tile/H-Tile Transceiver Registers. Note that you must reconfigure the EMIB to use the PRBS Verifier. To disable the pattern generators and verifiers, write the original values back relevant attribute addresses. The pattern generators and verifiers are supported only for non-bonded channels.

You have PRBS control and status signals available to the core. The Transceiver Toolkit also provides an easy way to use the PRBS generator and verifier along with the PRBS soft accumulators.