L- and H-Tile Transceiver PHY User Guide

ID 683621
Date 1/30/2024
Document Table of Contents Clock Data Recovery (CDR) Unit

The PMA of each channel includes a channel PLL that you can configure as a receiver clock data recovery (CDR) for the receiver. You can also configure the channel PLL of channels 1 and 4 as a clock multiplier unit (CMU) PLL for the transmitter in the same bank. The CDR block locks onto the received serial data stream and extracts the embedded clock information in the serial data. There are two operating modes:
  • CDR mode—The CDR initially locks onto the reference clock, causing it to operate near the received data rate. After locking to the reference clock, the CDR transitions to lock-to-data mode where it adjusts the clock phase and frequency based on incoming data.
  • CMU mode—The CDR locks onto the reference clock and acts as a TX PLL, generating the clock source for the TX. The CDR cannot capture any recovered data in this mode and can only drive x1 clock lines.
Figure 194. Channel PLL Configured as CDR