L- and H-Tile Transceiver PHY User Guide

ID 683621
Date 7/20/2022
Document Table of Contents TX Core FIFO in Interlaken/Basic Mode

  1. Deassert tx_digitalreset after PLL has acquired lock.
  2. Wait for tx_dll_lock (from Transceiver Native PHY), to assert.
  3. Assert tx_fifo_wr_en after tx_dll_lock asserts.
  4. Wait for tx_digitalreset_stat signal from the PHY to deassert, to ensure that tx_digitalreset deasserts successfully.

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