L- and H-Tile Transceiver PHY User Guide

ID 683621
Date 10/05/2023
Document Table of Contents

7.4. Background Calibration

For better performance of applications running at datarates equal to or greater than 17.5 Gbps, enable background calibration in the Native PHY IP.
Note: Only H-Tile production devices support background calibration.

When you upgrade from a previous version of the Intel® Quartus® Prime software to Intel® Quartus® Prime software version 18.1 or later, the Native PHY IP automatically enables the Enable background calibration feature.

  1. Turn on Enable background calibration.
    Figure 253. Enable Background Calibration
    Background calibration is always running, so PreSICE always controls Avalon® memory-mapped interface.
  2. If you dynamically reconfigure the GX rate to GXT rate, choose 1_1v for VCCR_GXB and VCCT_GXB supply voltage for the Transceiver even when you are at the GX rate.
  3. If you turn on the Share reconfiguration interface option for a multichannel PHY configuration, you must disable background calibration by setting 0 to 0x542[0] for every channel to get Avalon® memory-mapped interface access.
    For example, if the Share reconfiguration Interface option is enabled for three transceiver channels, you must disable the background calibration for all three channels before you have access to the Avalon® memory-mapped interface on these channels.