L- and H-Tile Transceiver PHY User Guide

ID 683621
Date 10/05/2023
Document Table of Contents Instantiating CMU PLL IP Core

The CMU PLL IP core for Intel® Stratix® 10 transceivers provides access to the CMU PLLs in hardware. One instance of the CMU PLL IP core represents one CMU PLL in hardware.
  1. Open the Intel® Quartus® Prime Pro Edition.
  2. Click Tools > IP Catalog.
  3. In IP Catalog, under Library > Interface Protocols > Transceiver PLL , select Intel® Stratix® 10 L-Tile/H-Tile Transceiver CMU PLL and click Add.
  4. In the New IP Instance Dialog Box, provide the IP instance name.
  5. Select Intel® Stratix® 10 device family.
  6. Select the appropriate device and click OK.
The CMU PLL IP core Parameter Editor window opens.