L- and H-Tile Transceiver PHY User Guide

ID 683621
Date 7/20/2022
Public
Document Table of Contents

2.4.2.6.2. RX Data Polarity Inversion

Use the RX data polarity inversion feature to swap the positive and negative signals of a serial differential link if they were erroneously swapped during board layout.

To enable RX data polarity inversion, when using the Enhanced PCS, select the Enable RX data polarity inversion option in the Gearbox section of the Native PHY IP core. Refer to the RX Gearbox, RX Bitslip, and Polarity Inversion section for more information.

To enable receiver polarity inversion in Basic/Custom (Standard PCS), Basic/Customer w/ Rate Match (Standard PCS), and in Standard PCS low latency mode, perform the following actions in the Native PHY IP core:

  • Select the Enable RX polarity inversion option
  • Select the Enable rx_polinv port option
This mode adds rx_polinv. If there is more than one channel in the design,rx_polinv is a bus in which each bit corresponds to a channel. Provided that rx_polinv is asserted, the RX data received has a reverse polarity. You can verify this feature by monitoring rx_parallel_data.
Note: For PCS Direct, you may enable the static polarity inversion bits through register access. Refer to the Logical View of the L-Tile/H-Tile Transceiver Registers for details.
Figure 66. RX Polarity Inversion

Refer to the RX Polarity Inversion Feature section for more information.

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