L- and H-Tile Transceiver PHY User Guide

ID 683621
Date 1/30/2024
Public
Document Table of Contents

2.3.9. PCS Direct Datapath Parameters

Table 44.  PCS Direct Datapath Parameters
Parameter Range Description
PCS Direct interface width 8, 10, 16, 20, 32, 40, 64 Specifies the data interface width between the FPGA Fabric width and the transceiver PMA.