Visible to Intel only — GUID: hjd1629177805135
Ixiasoft
Visible to Intel only — GUID: hjd1629177805135
Ixiasoft
2.4.4.4.2. Preserving ODI Performance
There are two methods to enable the ODI circuit full time. The first method is by setting 0x168[2] and 0x168[0] to 0x1 through the Avalon® memory-mapped interface for each GXT channel. The second method is by implementing the following Quartus® Prime software (.qsf) settings for each GXT channel.
set_instance_assignment -name HSSI_PARAMETER "pma_adapt_adp_odi_en=RADP_ODI_EN_ENABLE" -to <rx_serial_data input port> -entity <top level entity name>
set_instance_assignment -name HSSI_PARAMETER "pma_adapt_adp_odi_start=RADP_ODI_START_1" -to <rx_serial_data input port> -entity <top level entity name>
set_instance_assignment -name HSSI_PARAMETER "pma_adapt_odi_mode=ODI_ENABLE" -to <rx_serial_data input port> -entity <top level entity name>
For example, if the GXT channel receiver pin port name is gxt_rx_serial[0] and the top level entity of the project is top_gxt, you must structure the assignments with the following syntax:
set_instance_assignment -name HSSI_PARAMETER "pma_adapt_adp_odi_en=RADP_ODI_EN_ENABLE" -to gxt_rx_serial[0] -entity top_gxt
set_instance_assignment -name HSSI_PARAMETER "pma_adapt_adp_odi_start=RADP_ODI_START_1" -to gxt_rx_serial[0] -entity top_gxt
set_instance_assignment -name HSSI_PARAMETER "pma_adapt_odi_mode=ODI_ENABLE" -to gxt_rx_serial[0] -entity <top level top_gxt
For GX channels that are dynamically reconfigured to GXT mode, and if ODI feature is required during GXT mode, enable the ODI circuit full time whether in GX or GXT mode.
Performance of ODI circuit of a GX channel at data rates 17.4 Gbps and below is not affected.