L- and H-Tile Transceiver PHY User Guide

ID 683621
Date 7/20/2022
Public
Document Table of Contents

4.8. Resetting Transceiver Channels Revision History

Document Version Changes
2018.07.06 Made the following changes:
  • Changed "user reset" to "reset."
2018.05.16 Made the following changes:
  • For the Reset Controller System Diagrams, moved the tx_ready and rx_ready signals and added "or Intel IP" to the reset controller.
2018.03.16 Made the following changes:
  • Added Tile Type of Native PHY IP options to "Transceiver PHY Reset Controller Intel® Stratix® 10 FPGA IP Parameters."
2017.06.06 Made the following change:
  • Added a new section "Using PCS Reset Status Ports".
2016.12.21 Initial release

Did you find the information on this page useful?

Characters remaining:

Feedback Message