L- and H-Tile Transceiver PHY User Guide

ID 683621
Date 7/20/2022
Public
Document Table of Contents

1.1.1. Intel® Stratix® 10 GX/SX H-Tile Configurations

The Intel® Stratix® 10 GX FPGAs meet the high-performance demands of high-throughput systems with up to 10 teraflops (TFLOPs) of floating-point performance. Intel® Stratix® 10 GX FPGAs also provide transceiver support up to 28.3 Gbps for chip-module, chip-to-chip, and backplane applications.

The Intel® Stratix® 10 SX SoCs features a hard processor system with 64 bit quad-core ARM* Cortex*-A53 processor available in all densities, in addition to all the features of Intel® Stratix® 10 GX devices.

Figure 2.  Intel® Stratix® 10 GX/SX Device with 1 H-Tile (24 Transceiver Channels)
Figure 3.  Intel® Stratix® 10 GX/SX Device with 2 H-Tiles (48 Transceiver Channels)
Figure 4.  Intel® Stratix® 10 GX/SX Device with 4 H-Tiles (96 Transceiver Channels)
Figure 5.  Intel® Stratix® 10 GX 10M Device with 4 H-Tiles (48 Transceiver Channels)

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