L- and H-Tile Transceiver PHY User Guide

ID 683621
Date 1/30/2024
Public
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5.3.1.3.2. Byte Serializer Disabled Mode

In disabled mode, the byte serializer is bypassed. The data from the TX FIFO is directly transmitted to the 8B/10B encoder, TX Bitslip, or Serializer, depending on whether or not the 8B/10B encoder and TX Bitslip are enabled. Disabled mode is used in low-speed applications such as GigE, where the FPGA fabric and the TX standard PCS can operate at the same clock rate.