L- and H-Tile Transceiver PHY User Guide

ID 683621
Date 7/20/2022
Public
Document Table of Contents

5.2.2.10. RX Core FIFO

The RX Core FIFO provides an interface between the FPGA Fabric and across EMIB to RX PCS FIFO. It ensures reliable transfer of data and status signals.
The RX Core FIFO Operates in the following modes:
  • Phase Compensation Mode
  • Register Mode
  • Basic Mode
  • Interlaken
  • 10GBase-R

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