126.96.36.199. ATX PLL/fPLL/CMU PLL Calibration Registers
During calibration when PreSICE is controlling the internal configuration bus, you cannot read from or write to calibration enable registers.
To enable calibration, you must perform a read-modify-write on offset address 0x100.
- Read the offset address 0x100.
- Keep the value from MSB[7:1] and set LSB to 1.
- Write the new value to the offset address 0x100.