L- and H-Tile Transceiver PHY User Guide

ID 683621
Date 7/20/2022
Public
Document Table of Contents

4.3.1.4. Resetting the Receiver During Device Operation (Auto Mode)

Follow this reset sequence to reset the analog or digital blocks of the receiver at any point during the device operation. Use this reset to re-establish a link. Your user coded Reset Controller must comply with the reset sequence below to ensure a reliable receiver operation.

The step numbers in this list correspond to the numbers in the following figure.

  1. Assert rx_analogreset and rx_digitalreset while rx_cal_busy is low.
  2. Wait for rx_analogreset_stat to assert, to ensure that rx_analogreset asserts successfully. rx_analogreset_stat goes high when RX PMA has been successfully held in reset.
    1. Deassert rx_analogreset.
  3. Wait for rx_analogreset_stat to deassert, to ensure that rx_analogreset deasserts successfully. rx_analogreset_stat goes low when RX PMA has been successfully released out of reset.
  4. The rx_is_lockedtodata signal goes high after the CDR acquires lock.
  5. Ensure rx_is_lockedtodata is asserted for tLTD (minimum of 5 μs) before deasserting rx_digitalreset.
  6. Wait for rx_digitalreset_stat from the PHY, to deassert, to ensure that rx_digitalreset deasserts successfully in the PCS.
Figure 177. Receiver Reset Sequence During Device Operation

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