L- and H-Tile Transceiver PHY User Guide

ID 683621
Date 1/30/2024
Document Table of Contents

2.2.3. Create Reconfiguration Logic

Dynamic reconfiguration is the ability to dynamically modify the transceiver channels and PLL settings during device operation. To support dynamic reconfiguration, your design must include an Avalon® memory-mapped interface master that can access the dynamic reconfiguration registers using the Avalon® memory-mapped interface.

The Avalon® memory-mapped interface enables PLL and channel reconfiguration. You can dynamically adjust the PMA parameters, such as differential output voltage swing, and pre-emphasis settings. This adjustment can be done by writing to the Avalon® memory-mapped interface reconfiguration registers through the user-generated Avalon® memory-mapped interface master.

For detailed information on dynamic reconfiguration, refer to Reconfiguration Interface and Dynamic Reconfiguration chapter.