L- and H-Tile Transceiver PHY User Guide

ID 683621
Date 7/20/2022
Public
Document Table of Contents

4.3.1.2. Resetting the Transmitter During Device Operation

Follow this reset sequence to reset the analog or digital blocks of the transmitter at any point during the device operation. Use this reset to re-establish a link. Your user coded Reset Controller must comply with the reset sequence below to ensure a reliable transmitter operation.

The step numbers in this list correspond to the numbers in the following figure.

  1. Assert tx_analogreset and tx_digitalreset, while pll_cal_busy and tx_cal_busy are low.
  2. Wait for tx_analogreset_stat from the PHY to assert, to ensure that tx_analogreset asserts successfully. tx_analogreset_stat goes high when TX PMA has been successfully held in reset.
    1. Deassert tx_analogreset.
  3. Wait for tx_analogreset_stat from the PHY, to deassert, to ensure that tx_analogreset deasserts successfully. tx_analogreset_stat goes low when TX PMA has been successfully released out of reset.
  4. The pll_locked signal goes high after the TX PLL acquires lock. Wait for tx_analogreset_stat to deassert before monitoring the pll_locked signal.
  5. Deassert tx_digitalreset a minimum ttx_digitalreset time after pll_locked goes high.
  6. Wait for tx_digitalreset_stat from the PHY, to deassert, to ensure that tx_digitalreset deasserts successfully in the PCS.
Figure 175. Transmitter Reset Sequence During Device Operation

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