L- and H-Tile Transceiver PHY User Guide

ID 683621
Date 1/30/2024
Document Table of Contents ModelSim Byte Ordering Analysis

This analysis is performed on ModelSim.

The system is brought out of reset and a TX pattern is driven to the RX channel. Initially, RX is streaming data before the system is ready. Once the system is ready, the resulting RX word has the control character at the incorrect position. The output of the byte ordering RTL confirms that the control character is realigned to the correct LSB location.

For the purposes of experimentation, the TX pattern is changed without reset. This is an attempt to emulate any inconsistencies experienced by the RX channel due to SI/PI, thermal, or PDN issues. In this example, the RX data binds the control character to the expected LSB even after the output of the byte ordering block.

Figure 223. ModelSim Byte Ordering Analysis