V-Series Transceiver PHY IP Core User Guide

ID 683171
Date 7/26/2022
Public
Document Table of Contents

17.5. Transceiver Reconfiguration Controller Interfaces

This section describes the top-level signals of the Transceiver Reconfiguration Controller.
Figure 89. Top-Level Signals of the Transceiver Reconfiguration Controller
Note: By default, the Block Diagram shown in the MegaWizard Plug-In Manager labels the external pins with the interface type and places the interface name inside the box. The interface type and name are used in the Hardware Component Description File (_hw.tcl). If you click Show signals, the block diagram expands to show all of the signals of the component given the options currently selected in the MegaWizard Plug-In Manager.

For more information about _hw.tcl files refer to the Component Interface Tcl Reference in volume 1 of the Intel® Quartus® Prime Handbook.

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