V-Series Transceiver PHY IP Core User Guide

ID 683171
Date 7/26/2022
Public
Document Table of Contents

20.2.2.8. XCVR_RX_SD_OFF

Pin Planner and Assignment Editor Name

Receiver Cycle Count Before Signal Detect Block Declares Loss Of Signal

Description

Number of parallel cycles to wait before the signal detect block declares loss of signal. Only used for the PCIe PIPE PHY, SATA, and SAS protocols.

Options

0–29

1

Assign To

Pin - RX serial data

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