V-Series Transceiver PHY IP Core User Guide

ID 683171
Date 7/26/2022
Public
Document Table of Contents

3.20. 1588 Delay Requirements

The 1588 protocol requires symmetric delays or known asymmetric delays for all external connections.

In calculating the delays for all external connections, you must consider the delay contributions of the following elements:

  • The PCB traces
  • The backplane traces
  • The delay through connectors
  • The delay through cables

Accurate calculation of the channel-to-channel delay is important in ensuring the overall system accuracy.

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