V-Series Transceiver PHY IP Core User Guide

ID 683171
Date 7/26/2022
Document Table of Contents

10.3.8. Presets for Ethernet

Presets allow you to specify a group of parameters to implement a particular protocol or application. If you apply the presets for GIGE-1.25 Gbps or GIGE–2.5 Gbps, parameters with specific required values for those protocols are set for you. Selecting a preset does not prevent you from changing any parameter to meet the requirements of your design.
Table 132.  Presets for Ethernet Protocol
Parameter Name GIGE-1.25 Gbps GIGE-2.50 Gbps
General Options Tab
Parameter validation rules GIGE GIGE
Enable bonding Off Off
FPGA fabric transceiver interface width 8 16
PCS-PMA Interface Width 10 10
Data rate 1250 Mbps 3125 Mbps
Input clock frequency 62.5 MHz 62.5 MHz
Enable TX Bitslip Off Off
Create rx_coreclkin port Off Off
Create tx_coreclkin port Off Off
Create rx_recovered_clk port Off Off
Create optional ports Off Off
Avalon data interfaces Off Off
Enabled embedded reset controller On On
Word Aligner Options
Word alignment mode Automatic synchronization state machine Automatic synchronization state machine
Number of consecutive valid words before sync state is reached 3 3
Number of bad data words before loss of sync state 3 3
Number of valid patterns before sync state is reached 3 3
Create optional word aligner status ports Off Off
Word aligner pattern length 10 10
Word alignment pattern 0101111100 0101111100
Enable run length violation checking Off Off
Run length - -
Rate Match Options
Enable rate match FIFO On On
Rate match insertion/deletion +ve disparity pattern 10100010010101111100 10100010010101111100
Rate match insertion/deletion -ve disparity pattern 10101011011010000011 10101011011010000011
8B/10B Options
Enable 8B/10B decoder/encoder On On
Enable manual disparity control Off Off
Create optional 8B/10B status port Off Off
Byte Order Options
Enable byte ordering block Off Off
Enable byte ordering block manual control Off Off
Byte ordering pattern - -
Byte ordering pad pattern - -