V-Series Transceiver PHY IP Core User Guide

ID 683171
Date 7/26/2022
Public
Document Table of Contents

9.13.3. Phase 2 (Optional)

This section describes the (optional) Phase 2.

During Phase 2, the Endpoint tunes the TX coefficients of the Root Port. The TS1 Use Preset bit determines whether the Endpoint uses presets for coarse resolution or coefficients for fine resolution.

Note: If you are using the PHY IP Core for PCI Express (PIPE) PCI Express as an Endpoint, you cannot perform Phase 2 tuning. The PIPE interface does not provide any measurement metric to the Root Port to guide coefficient preset decision making. The Root Port should reflect the existing coefficients and move to the next phase. The default Full Swing (FS) value advertized by Altera device is 40 and Low Frequency (LF) is 13.

If you are using the PHY IP Core for PCI Express (PIPE) PCI Express as Root Port, the End Point can tune the Root Port TX coefficients.

The tuning sequence typically includes the following steps:

  1. The Endpoint receives the starting presets from the Phase 2 training sets sent by the Root Port.
  2. The circuitry in the Endpoint receiver determines the BER and calculates the next set of transmitter coefficients using FS and LF and embeds this information in the Training Sets for the Link Partner to apply to its transmitter.

    The Root Port decodes these coefficients and presets, performs legality checks for the three transmitter coefficient rules and applies the settings to its transmitter and also sends them in the Training Sets. Three rules for transmitter coefficients are:

    1. |C-1| <= Floor (FS/4)
    2. |C-1|+C0+|C+1| = FS
    3. C0-|C-1|-|C+1 |>= LF

    Where:

    C0 is the main cursor (boost)

    C-1 is the pre-cursor (pre shoot)

    C+1 is the post-cursor (de emphasis)

  3. This process is repeated until the downstream component's receiver achieves a BER of < 10-12.

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