V-Series Transceiver PHY IP Core User Guide

ID 683171
Date 7/26/2022
Document Table of Contents

5.8. 1G/10GbE PHY Interfaces

Figure 30. 1G/10GbE PHY Top-Level Signals

The block diagram shown in the GUI labels the external pins with the interface type and places the interface name inside the box. The interface type and name are used in the _hw.tcl file. If you turn on Show signals, the block diagram displays all top-level signal names. For more information about _hw.tcl files, refer to refer to the Component Interface Tcl Reference chapter in volume 1 of the Intel® Quartus® Prime Handbook

Note: Some of the signals shown in are this figure are unused and will be removed in a future release. The descriptions of these identifies them as not functional.