V-Series Transceiver PHY IP Core User Guide

ID 683171
Date 7/26/2022
Document Table of Contents

4.2. Device Family Support

IP cores provide either final or preliminary support for target Altera device families. These terms have the following definitions:

  • Final support—Verified with final timing models for this device.
  • Preliminary support—Verified with preliminary timing models for this device.
Table 23.  Device Family Support
Device Family Support Supported Speed Grades
Arria V GZ devices–Hard PCS and PMA Final I3L, C3, I4, C4
Stratix V devices–Hard PCS and PMA Final All speed grades except I4 and C4
Other device families No support

Altera verifies that the current version of the Intel® Quartus® Prime software compiles the previous version of each IP core. Any exceptions to this verification are reported in the MegaCore IP Library Release Notes and Errata. Altera does not verify compilation with IP core versions older than the previous release.

Note: For speed grade information, refer to DC and Switching Characteristics for Stratix V Devices in the Stratix V Device Datasheet.